Leakage Current Reduction Technique for Four-Level Capacitor Clamped Inverters

Transformerless inverters (TIs) are widely applied in grid connected photovoltaic (PV) systems due to their advantages of high efficiency and low cost. However, the absence of galvanic isolation can result in ground leakage currents caused by the parasitic parameters of the PV system, leading to safety concerns and degraded power quality. This paper focuses on reducing the leakage current of the existing single phase BIH6 inverter by introducing an improved PWM modulation strategy. In the BIH6 structure under conventional control, the common-mode voltage (CMV) still oscillates around Vdc/2, causing the leakage current to potentially exceed 100 mA. In this study, a new modulation technique is applied to the BIH6 inverter to eliminate the zero-switching state among its eight operating states. Removing this state enables the CMV to remain constant throughout the entire switching process, thereby contributing to the reduction of leakage current. Although the number of output voltage levels decreases due to the removal of one switching state, the total harmonic distortion (THD) of both output voltage and current remains below 5%, and the inverter efficiency reaches 95%, meeting power quality requirements for grid connected PV systems. The paper provides a detailed explanation of the operating principles, mathematical modeling, and the proposed control methodology for the inverter, along with the implementation of a grid current synchronization strategy. Simulation results are included to validate the feasibility of the proposed control method. In addition, a hardware prototype has been developed using the TMS320F28379D digital signal processor (Texas Instruments, Dallas, Texas, USA) in combination with an Altera Cyclone® IV EP4CE22F17C6N FPGA platform (Intel Corporation, Santa Clara, California, USA).